A power-on-reset (POR) circuit can be used to ensure that a stable supply voltage is provided to the elements of a chip or integrated circuit. If the supply voltage for the chip is below a threshold voltage (either as a result of the chip being “powered-on” or a “brown-out” event where the supply voltage temporarily drops), the elements of the chip may not function properly due to the low supply voltage. The POR circuit can be used to provide a reset signal that keeps the elements of the chip in a reset state until the supply voltage has stabilized.
A conventional POR circuit can use the threshold voltage of a diode to monitor the supply voltage. The system voltage, or a voltage that is proportional to the system voltage, may be provided to the diode and if it fails to exceed the voltage, the reset signal may be provided. One drawback to the using the threshold voltage of the diode is that the threshold voltage can vary with temperature. In addition, the threshold voltage of the diode may also change with process variations in the diode's manufacture. The variance of the threshold voltage of the diode with temperature or process variations can make accurate monitoring of the supply voltage difficult.
A payment terminal can include one or more chips having corresponding POR circuits that are used to process payment transactions and interact with payment devices such as a payment card having a magnetic strip that is swiped in a magnetic reader of the payment terminal, a payment device having a Europay/Mastercard/Visa (EMV) chip that is inserted into a corresponding EMV slot of the payment terminal, and near field communication (NFC) enabled devices such as a smartphone or EMV card that is tapped at the payment terminal and transmits payment information over a secure wireless connection. In order to ensure accurate processing of payment transactions, stable operation of the chips in the payment terminal is required. Merchants and consumers attempting to complete a payment transaction may become frustrated if errors occur during payment transactions or the payment transactions are not otherwise processed accurately due to unstable operation of the chips in the payment terminal.